FPAs are typically comprised of a two-dimensional array of monolithic IR detectors. The individual detectors may be organized in a regular row and column, mosaic-type fashion. Such an array of detectors may be comprised of HgCdTe, InSb, GaAs:Mn or doped silicon semiconductor material. The IR detector induced signal from each of the IR detectors is typically coupled to FPA readouts, such as CTIA, source follower direct readout or charge coupled devices, where each of the signals are integrated over an interval of time and subsequently read out by a suitable multiplexing means. Research and development efforts on HgCdTe IR detectors have achieved many technical breakthroughs in long wavelength response with minimal cooling loads for long-duration system applications. It has been found that cryogenic temperature electronics with HgCdTe detector arrays for processing IR induced signals require a significant degree of material compatibility to achieve a long lifetime and reliable operation.
Also, FPA readouts require low device and circuit noise characteristics for obtaining a satisfactory signal-to-noise ratio. The readouts must also tolerate nuclear radiation in high nuclear environments, and also consume low power to achieve both weight and size reduction.
Typically, readouts chips are coupled to, or "bumped", with detector arrays at room temperature using indium bump technology. When the chips are cooled to a cryogenic operating temperature, stress can build up between the readout circuit and the detector array through the bumping if the coefficients of thermal expansion between the materials is sufficiently different and/or if the chips are large. Silicon, the conventional semiconductor material employed for readout circuits, has a poor thermal expansion match with the common detector materials such as HgCdTe and InSb. GaAs, on the other hand, offers a very close thermal match with these detector materials. Thus, the reliability problem related to bond pad stress can be eliminated by, in accordance with the invention, using GaAs as the semiconductor material for the readout circuit.
For an indium bump hybridized GaAs FPA readout array, GaAs material matches the temperature expansion coefficient of the HgCdTe IR detector array almost exactly within typical cryogenic temperature ranges. GaAs transistors are extremely tolerant of total dose radiation. The total dose radiation of biased GaAs enhancement mode (E-) and depletion mode (D-) field effect transistors (FETs) has been reported to be in excess of 1.0E8 Rads(Si). The observed shifts in threshold voltage of GaAs FETs due to the radiation are most probably related to increases in surface states between the metal and the semiconductor. This effect is analogous that observed in silicon FETs where increases in surface state density cause trapped charge to increase threshold voltage according to the thickness of the oxide. Unlike a silicon MOSFET, however, there is no accumulation of trapped charges in the oxide of a GaAs transistor because there is no oxide in the gate region. Thus, a silicon FET is much less tolerable to radiation than a GaAs transistor.
It is therefore one object of the present invention to provide a GaAs FPA signal processor which exhibits a low power consumption and an improved immunity to nuclear radiation (radiation hardness).
It is a further object of the present invention to provide a GaAs FPA signal processor which processes data at a high data gate and which permits a high circuit density.
It is a further object of the present invention to provide a GaAs FPA signal processor which exhibits low noise when employed in a FPA signal processor.
It is still one further object of the present invention to provide a GaAs FPA signal processor array which has a coefficient of thermal expansion which is similar to that of the material of many IR detecting arrays.
One still further object of the present invention is to provide a GaAs FPA signal processor array which readily compensates for process variations for providing uniform operation of signal processing circuitry across the array.